Unsigned division on a computer involves an iterative process. Each iteration includes the execution of one conditional subtraction instruction and that instruction generally executes in one clock cycle. For an M-bit/N-bit integer division in a computer, the division process requires the execution of M conditional subtraction instructions which execute over M cycles. For example, a 32-bit integer division operation in a computer may require a conditional subtraction instruction to be executed 32 times and thus take 32 clock cycles to complete. Integer division thus is a relatively time-consuming operation.